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Frequency margining is enormously simplified using this method as a result of the MultiSynth’s fractional divider value will be changed dynamically such that the clock output produces a variable clock supply. All frequency transitions are steady and glitchless. Frequency transitions as small as 1 kHz and as massive as 10 MHz are possible using this architecture. The frequency of each output clock may be changed dynamically for any frequency as much as 350 MHz. As a result, standalone crystal oscillators traditionally used for board-degree take a look at can be eliminated.